The growth of broadband services has been fueled by consumers' demands for greater and greater data rates to support streaming video applications. Communication service providers therefore require an infrastructure that can support high data rates in bandwidth limited systems. Unfortunately, coding schemes employed in conventional video broadcasting systems can only provide relatively low throughput. Therefore, there is a need for a video broadcasting system that uses powerful LDPC codes to support higher date rates for the same bandwidth and power, without introducing greater complexity.
A fundamental problem in the field of data storage and communication is the development of efficient error-correcting codes. The mathematical foundations of error correction were established by Shannon. The most fundamental work of Shannon is the concept of noisy channel capacity, which defines a quantity that specifies the maximum rate at which information can be reliably transmitted through the channel. This capacity is called Shannon capacity. One of the most important research areas in information and coding theory is to devise coding schemes offering performance approaching Shannon capacity with reasonable complexity. Recently, a considerable interest has grown in a class of codes known as LDPC codes due to their feasible iterative decoding complexity and near-Shannon capacity performance.
In 1993, similar iterative methods were shown to perform very well for a new class of codes known as “turbo-codes.” The success of turbo-codes was partially responsible for greatly renewed interest in LDPC codes and iterative decoding methods. There has been a considerable amount of recent work to the analysis and the iterative decoding methods for both turbo-codes and LDPC codes. For instance, a special issue of the IEEE Communications Magazine was devoted to this work in August 2003 (see T. Richardson and R. Urbanke, “The Renaissance of Gallager's Low-Density Parity Check Codes,” IEEE Communications Magazine, vol. 41, pp. 126-131, August 2003, and C. Berrou, “The Ten-Year-Old Turbo Codes are entering into Service,” IEEE Communications Magazine, vol. 41, pp. 110-117, August 2003).
LDPC codes were first described by Gallager in the 1960s. LDPC codes perform remarkably close to Shannon limit. A binary (N, K) LDPC code, with a code length N and dimension K, is defined by a parity check matrix H of (N−K) rows and N columns. Most entries of the matrix H are zeros and only a small number the entries are ones, hence the matrix H is sparse. Each row of the matrix H represents a check sum, and each column represents a variable, e.g., a bit or symbol. The number of 1's in a row or a column of the parity check matrix H is called the weight of the row or the column. The LDPC codes described by Gallager are regular, i.e., the parity check matrix H has constant-weight rows and columns.
Regular LDPC codes can be extended to irregular LDPC codes, in which the weights of rows and columns vary. An irregular LDPC code is specified by degree distribution polynomials v(x) and c(x), which define the variable and check node degree distributions, respectively. More specifically, let
                                          v            ⁡                          (              x              )                                =                                    ∑                              j                =                1                                            d                                  v                  ⁢                                                                          ⁢                  max                                                      ⁢                                          v                j                            ⁢                              x                                  j                  -                  1                                                                    ,                                  ⁢        and                            (        1        )                                                      c            ⁡                          (              x              )                                =                                    ∑                              j                =                1                                            d                cmax                                      ⁢                                          c                j                            ⁢                              x                                  j                  -                  1                                                                    ,                            (        2        )            where the variables dv max and dc max are a maximum variable node degree and a check node degree, respectively, and vi(ci) represents the fraction of edges emanating from variable (check) nodes of degree j. The bit and check nodes degree distributions of an irregular LDPC code can also be described by specifying the numbers of bit or check nodes with different degrees. For instance, an irregular LDPC code with bit node degree distribution (bi,bi)=(Ni,Ni) contains Ni and Ni bit nodes with degree bi and bi, respectively. While irregular LDPC codes can be more complicated to represent and/or implement, it has been shown, both theoretically and empirically, that irregular LDPC codes with properly selected degree distributions outperform regular LDPC codes. FIG. 5 illustrates a parity check matrix representation of an exemplary irregular LDPC code of codeword length six.
LDPC codes can also be represented by bipartite graphs, or Tanner graphs. In a Tanner graph, one set of nodes called variable nodes (or bit nodes) corresponds to the bits of the codeword and the other set of nodes called constraints nodes (or check nodes) corresponds the set of parity check constraints which define the LDPC code. Bit nodes and check nodes are connected by edges. A bit node and a check node are to be neighbors or adjacent if they are connected by an edge. Generally, it is assumed that a pair of nodes is connected by at most one edge.
FIG. 6 illustrates a bipartite graph (Tanner graph) representation of the irregular LDPC code illustrated in FIG. 5. The LDPC code represented by FIG. 6 is of codeword length 6 and has 4 parity checks. As shown in FIG. 5, there are totally 9 one's in the parity check matrix representation of the LDPC code. Therefore in the Tanner graph representation shown in FIG. 6, 6 bit nodes 601 are connected to 4 check nodes 602 by 9 edges 603.
LDPC codes can be decoded in various ways such as majority-logic decoding and iterative decoding. Because of the structures of their parity check matrices, LDPC codes are majority-logic decodable.
Although majority-logic decoding requires the least complexity and achieves reasonably good error performance for decoding some types of LDPC codes with relatively high column weights in their parity check matrices (e.g., Euclidean geometry LDPC and projective geometry LDPC codes), iterative decoding methods have received more attention due to their better performance versus complexity tradeoffs. Unlike majority-logic decoding, iterative decoding processes the received symbols recursively to improve the reliability of each symbol based on constraints that specify the code. In the first iteration, the iterative decoder only uses the channel output as input, and generates reliability output for each symbol. Subsequently, the output reliability measures of the decoded symbols at the end of each decoding iteration are used as inputs for the next iteration. The decoding process continues until a certain stopping condition is satisfied. Then final decisions are made based on the output reliability measures of the decoded symbols from the last iteration. According to the different properties of reliability measures used at each iteration, iterative decoding algorithms can be further divided into hard decision, soft decision and hybrid decision algorithms. The corresponding popular algorithms are iterative bit-flipping (BF), belief propagation (BP), and weighted bit-flipping (WBF) decoding, respectively. Since the BP algorithm has been proven to provide maximum likelihood decoding given that the underlying Tanner graph is acyclic, it becomes the most popular decoding method.
Belief propagation for LDPC codes is a type of message passing decoding. Messages transmitted along the edges of the graph are log-likelihood ratio (LLR) log p0/p1 associated with variable nodes corresponding to codeword bits. In this expression p0 and p1 denote the probability that the associated bit takes value 0 and 1, respectively. BP decoding has two steps, a horizontal step and a vertical step.
In the horizontal step, each check node cm sends to each adjacent bit bn a check-to-bit message which is calculated based on all bit-to-check messages incoming to the check cm, except the one from bit bn. In the vertical step, each bit node bn sends to each adjacent check node cm a bit-to-check message which is calculated based on all check-to-bit messages incoming to the bit bn except the one from check node cm. These two steps are repeated until a valid codeword is found or the maximum number of iterations is reached.
Because of its remarkable performance with BP decoding, irregular LDPC codes are among the best for many applications. Various irregular LDPC codes have been accepted or are being considered for various communication and storage standards, such as DVB-S2/DAB, wireline ADSL, IEEE 802.11n, and IEEE 802.16[4][5]. While considering applying irregular LDPC codes to video broadcasting systems, one often encounters a problem related to error floor.
The error floor performance region of an LDPC decoder can be described by the error performance curve of the system. The LDPC decoder system typically exhibits a sharp decrease in error probability as the quality of the input signal improves. The resulting error performance curves are conventionally called a waterfall curve and the corresponding region is called a waterfall region. At some point, however, the decrease of error probability with input signal quality increase decreases. The resulting flat error performance curve is called the error floor. FIG. 7 illustrates an exemplary FER performance curve containing waterfall 701 and error floor regions 702 of an irregular LDPC code.
Most video broadcasting systems require a frame error rate (FER) as low as 10^−7. While given codeword length of practical interest (less than 20 k) and power constraint, most irregular LDPC codes exhibit error floor higher than 10^−6, which is too high for video broadcasting applications.
LDPC codes have been used in the digital video broadcasting second generation applications (DVB S2). The first generation DVBS was introduced as a standard in 1994 and is now widely used for video broadcasting throughout the world. The ECC used in DVBS is concatenated convolutional and Reed-Solomon codes which is considered not powerful enough. Therefore in 2002 DVB S2 Project called for new coding proposals which are capable of offering 30% throughput increase for the same bandwidth and power. After examining more than 7 candidates proposed by worldly renowned research labs and companies in terms of performance and hardware complexity, the committee chose a solution based on LDPC codes which provides more than 35% throughput increase with respect to DVBS. Therefore, the LDPC codes used in the DVBS2 standard are widely considered as state-of-the-art. In comparison to the LDPC codes in the DVBS2 standard, the family of LDPC codes in the present invention has two advantages. First, the codeword length of the LDPC codes in the present invention is 15360, which is much shorter than 64800, and 16200, which are the codeword lengths of the normal and the short LDPC codes in the standard DVBS2, respectively. It is well known in the ECC area that, the longer the codeword length of an LDPC code, the better the asymptotic performance the LDPC code can offer (T. Richardson, M. Shokrollahi, and R. Urbanke, “Design of capacity-approaching irregular low-density parity-check codes,” IEEE Trans. Inf. Theory, vol. 47, pp. 619-637, February 2001). Nevertheless the LDPC codes in the present invention can provide similar performance as the longer LDPC codes in the DVBS2 standard. It is also known that, from the application perspective, hardware implementation favors shorter LDPC codes which cause less design trouble and less hardware cost. The second advantage is, the LDPC codes in the present invention can offer FER lower than 10^−7, which is required by video broadcasting application. By contrast, the LDPC codes in the DVBS2 standard can not provide FER lower than 10^−7 by themselves therefore outer BCH codes are concatenated to the LDPC codes as outer error correcting techniques to lower the error floor. It is well known in the ECC area that, the shorter the codeword length of an LDPC code, the higher the probability the LDPC code exhibits a higher error floor. Nevertheless, without any aid of concatenated codes and with much shorter codeword length, the LDPC codes in the present invention alone can provider FER lower than 10^−7.